Meanwhile, as I mentioned in a previous post, the high-speed-data Thunderbolt® interface by Intel — which is supported on new peripheral devices such as HDDs, some Apple products, and which is expected to be released in many ultra-thin notebooks this year by various OEMs, runs at a speedy 20Gbps symmetric. Thunderbolt combines power delivery of up to 10W, although up to 2.5W of the 10W power budget is consumed by the active transceiver chipsets built into the electrical cable itself.

The idea of these warp-speed interfaces including “enhanced” power delivery is exciting for users – but raises some questions for design engineers and electronics manufacturers. For instance:

• Will there be an over-current device that can achieve 100W output (20 volts @ 5amps) and still trip at the UL LPS spec limit of 8 amps in 5 seconds? And, will the 100W output be limited to a lower wattage due to over-current devices available on the market?

• Is it practical from a cost and size perspective for the overcurrent device to trip at varying power levels, i.e., 100W, 60W, 30W and 7.5W? And, correspondingly, if the overcurrent device does not trip at the varying power levels does the system remain in a “safe” condition during a short-circuit or overcurrent event?

• Will the output be true 100W (20V @ 5A) delivered to the electronic device, or in practice will it be <100W limited by the cable’s, connector’s, PCB’s and over-current device’s IR drop and resulting power loss?

These are only a few of the questions board designers and systems engineers will need to face when designing for higher power connectors.

Another challenge for designers is they will need to provide safeguards to help prevent overheating in legacy cables. Also, if new cables are required, they will need to take advantage of the higher power output capability while still maintaining backwards-compatibility with legacy cables for lower power output. Will yet another new connector, or family of connectors be required for higher power applications?

Changing gears a little to get back to the USB Power Delivery specification; imagine the applications of a high-powered interface capable of delivering up to 100W. The result could be:

• No more laptop barrel jack power supplies.

• Super-thin / super-light displays and monitors that de-integrate the AC/DC converter.

• Octopus-like power supplies in the accessories market that can output up to 100W on each port to a number of different applications. This means powering a laptop, tablet PC, smartphone, monitor, Bluetooth mouse, etc, all at the same time.

New and faster connector speeds are a fact of life. The portable electronics industry won’t stop trying to improve the user experience by integrating power delivery capabilities — with increasingly faster interfaces — into lighter, smaller products.

As I’ve pointed out, a number of questions will need to be addressed in order to implement these new technologies. The good news is that design challenges create opportunities for circuit protection device manufacturers and cable/connector manufacturers.

More about circuit protection:

www.circuitprotection.com

These designs pose challenges for electronics engineers when it comes to adding thermal protection. Since universal dimmers are embedded in the wall, it’s difficult for them to dissipate heat. Also, the MOSFET used in lighting dimmer designs can fail in resistive mode, generating heat and leading to a thermal runaway condition and, possibly, catastrophic events.

Industry standards dictate that thermal protection be used in dimmer applications for obvious safety reasons. The most common solution is to use a thermal fuse/thermal cutoff (TCO) device. But this approach has its limitations. For instance thermal fuses can detect high temperatures but not high current. In some cases a failed power FET may not generate a hard short overcurrent condition but rather a resistive short that can produce unsafe temperatures through I2R heating. In this case, the resulting current may not be high enough to blow a standard fuse and prevent a catastrophic event.

Problem Solved
A new approach to this design challenge is to use a reflowable thermal protector, or RTP device.

In contrast to thermal fuses, when the RTP device is placed in close proximity to the FET, it tracks the FET’s temperature, and in the case of failure in resistive mode, activates when the FET reaches a specified temperature. In other words, this device trips or opens at a temperature where a thermal fuse would not to prevent damage resulting from thermal runaway.
So, I guess you could say this is a circuit protection device that is designed to fail.

In Europe and North America at least, LEDs are considered the better replacement choice compared to CFLs because the latter contains harmful mercury vapor, which potentially can be harmful if the bulb is broken and must be disposed of properly.

But then again, LEDs have their own issues, including performance degradation, junction damage and, possibly the potential for fire hazard. These problems are usually triggered by various fault events including overvoltage, overcurrent, electro-static discharge (ESD), inrush current, and poor thermal management.  To resolve these potential challenges, most ENERGY STAR-certified LED retrofits at the very least employ a fuse, varistor, Zener/Schottky diode, ESD diode or a FET/BJT in the driver circuit to minimize the damage resulting from electrical faults. However, there are only limited solutions to optimize thermal management, which is recognized as the most challenging task for developing reliable LED retrofits.

The idea behind the LED retrofit is that it must fit into the same space that a standard incandescent or CFL bulb would consume. The nature of solid-state lighting fundamentally restricts heat sink design and integration of components and therefore caps the efficiency of thermal management. With limited capability of thermal dissipation from the heat sink, the LED chips can be exposed to higher ambient temperatures if the environmental/operational conditions enable poor thermal management. Consequently, the LED retrofit would suffer from performance degradation at higher temperature such as brightness reduction and light flickering. Furthermore, permanent damage like junction meltdown could take place and cause a fire hazard when the LED chips are over-heated.

In response to the thermal challenge of LED lighting, solutions such as thermal fuses and resettable fold-back diodes are commonly employed to avoid junction meltdown. These devices are designed to cut off the LED driving current before it reaches the junction temperature. In contrast, a semiconductor-polymer hybrid device in the latest development was engineered to adjust the constant driving current dynamically based upon the LED temperature. When this hybrid device detects a thermal fault, it will automatically decrease the LED driving current, and therefore reduce the LED temperature. With such protection, the LED retrofit would not experience overheating and the illumination wouldn’t be interrupted by the system’s protection devices.

Despite all the challenges of LED retrofits, the market demand for LED lighting has never waned. According to a survey conducted by Canaccord Genuity in 2009, about 5.4 billion incandescent bulbs were installed for new housing developments in the United States and eventually the market will be overtaken by the LED retrofits once incandescent bulbs have been completely phased out. LED lighting continues to offer substantial business opportunities for retrofit manufactures – which in turn is driving lighting design engineers to resolve reliability issues caused by heating issues with LEDs.

We all know that at 1MHz, even very high capacitance devices would probably meet generic timing requirements when put on a signal line. This is a key difference between TE’s SESD devices and other devices.

High-speed ports using HDMI, USB 3.0 and Thunderbolt protocols operate at >Gigahertz speed, thus a 1MHz spec may not make sense for all applications. This is why we specify our SESD devices’ capacitance at 3GHz – a better reflection of the capability of our device for high-speed ports.

So when looking for a low-capacitance ESD protection device you should always ask the following questions: What frequency was the device specified at, and what frequency is your application specified at?

By first establishing that the device’s capacitance is measured at 1MHz, you can understand where we’re headed with this topic since no high-speed ports run at 1MHz. Our devices are specified for high-speed ports (0.1pF or 0.2pF measured at 3GHz). And lastly, by comparing insertion loss plots you can see that even at very high frequencies, our devices have little effect on the signal integrity.

More on circuit protection
If you are looking for low capacitance devices that really are low capacitance then look no further than TE Circuit Protection’s new line of SESD devices. Our SESD devices are available in single-channel as well as multi-channel arrays to suit a variety of applications, For more information visit our SESD page.

• New name-In March, our parent company became TE Connectivity.
• New website- TE Circuit Protection launched an updated website in May, www.circuitprotection.com, that is dedicated to circuit protection solutions.
• New products take off- Introduced in late 2010, by 2011 our RTP (reflowable thermal protector) device and the MHP (metal hybrid PPTC) rapidly gained popularity as people learned about their unique benefits. Product of the year win– In December we were notified that the MHP device won a prestigious 2011 “Product of the Year” award from Electronic Products magazine.

Of course we had our challenges in 2011, too. For one, well, our new name. Many still remember when we were Raychem. Then we became Tyco Electronics. Now we’re TE Connectivity, and more specifically to our business unit, TE Circuit Protection. Let’s face it, the history of our name can be a little confusing. But I’m confident that, as in the past, our reputation for providing excellent products under the Raychem brand will soon be synonymous with “TE Circuit Protection.”

On a somber note, 2011 was also the year of the natural disasters in Japan and Thailand. Like everyone around the world, we were saddened by the tragedy and of course we worried about our employees and colleagues in the affected regions where we have manufacturing facilities. Needless to say, we were extremely relieved to learn soon after these events that our people were safe. As with many component manufacturers, the devastation caused disruptions in our supply chain. However, we were soon up and running thanks to the dedication of our employees and suppliers. We’ve learned a lot since then about how to respond to unforeseen events caused by man-made economic crises or by natural ones.

Looking ahead to 2012 and beyond, the future looks bright for TE Circuit Protection. After all, we’re surrounded by electronic devices: TVs, laptops, automotive electronics, not to mention solar panels, wind turbines and E-bikes. And all of these products need to be made as safe and reliable as possible. As the posts from our bloggers can attest, protecting electronic devices has become more important – and more challenging – than ever.

Take for example Barry Brents, who points out in his post the importance of robust ESD protection in our shrinking mobile devices; and Pat Hibbs who tells us why next-generation gadgets using lightning-fast Thunderbolt and USB interfaces will need ever-tinier ESD devices to protect them. Our Faraz Hasan blogs about his article in EETimes describing why HD LED applications need thermal protection, and, finally, Kedar Bhatawadekar covers the challenges designers will face making sure that our futuristic Post-PC devices remain reliable when subjected to thermal, overcurrent, undercurrent and ESD events.

That’s where we come in – literally. For over 30 years TE Circuit Protection devices have been used inside a multitude of products. So, no matter what you call us, we’ve got you covered.

Here’s to a prosperous 2012 from – you got it – TE Circuit Protection.

Figure 1. Typical 8KV ESD pulse simulated by ESD generator. (Click image to enlarge)

Figure 1 shows a typical ESD characteristic curve. To simulate a real world contact discharge event, an ESD generator applies an ESD pulse to the device under test. Characteristics of this test are the short rise time and the short pulse duration of less than 100ns, indicating a low-energy, static pulse. Voltage levels generated by these sources can be extremely high since their charge is not readily distributed over their surfaces or conducted to other objects. While briefly painful, these high voltages are not dangerous to humans because the pulse duration is very short, and therefore the energy present is very low. However, their effect on sensitive electronic components can be very destructive.

Figure 2. Chip scale ESD devices help protect sensitive circuitry from ESD damage. (Click image to enlarge)

Small-geometry semiconductor devices can be damaged due to excessive voltage, high current levels, or a combination of both. High voltage levels can cause gate oxide punch-through, while excessive current can cause junction failures and metallization traces to melt.

Most electronic devices must meet a minimum of 8 kV contact discharge or 15 kV air discharge, based on the international standard IEC61000-4-2. Some silicon devices have built-in protection that is rated up to 2 kV and some have no protection built-in. So in order to enhance their survivability, additional off-chip protection circuits must be designed into the system.

There are two main design considerations in ESD protection design for high-speed I/O interfaces.

1. ESD protection circuits for high-speed I/O interfaces must be robust enough to effectively protect the thin gate oxide in the internal circuits against ESD stress.

2. The degradation of high-speed circuit performance due to the parasitic effects of ESD protection devices needs to be minimized. If the ESD protection device has high capacitance, it can attenuate the signal and cause data loss. At very high frequencies that reach well into the GHz range there may be few components that have a low enough capacitance (less than a picofarad) to prevent signal distortion.
The continuing trend toward discrete component miniaturization often presents designers with difficult and time-consuming engineering prototyping and rework challenges as well as manufacturing process control issues. New, smaller chip-scale ESD devices (down to 0201 sizes) meet the performance requirements for high-speed applications and can also help mitigate assembly and manufacturing challenges.
As shown in Figure 2, chip-scale ESD devices are used to divert a potentially damaging charge away from sensitive circuitry and protect the system from failure. Combining the advantages of an active silicon device with a traditional Surface-Mount Technology (SMT) passive packaging configuration, they are easier to install and rework than traditional semiconductor-packaged ESD devices.

Even when you are not deliberately trying to torture your siblings, electrostatic damage to electronic devices can occur at any time, from the factory floor to the end-user’s home. ESD transients may disrupt equipment operation or result in potential damage. Small form factor, low capacitance chip-scale ESD devices offer a simple, cost-effective solution to these challenges.

More on Circuit Protection
TE Circuit Protection offers a variety of Polymer and Silicon ESD protection devices. For more information on our devices you can visit our document library or our website.

This article was originally published on the Power Systems Design online Experts Exchange.

PPTC Resettable Devices
A PolySwitch PPTC device provides resettable OC/OT protection. Basically, it is a conductive polymer-based thermistor. Thermistors are characterized by either negative temperature coefficient behavior (NTC) where the resistance of the device decreases with temperature, or positive temperature coefficient behavior (PTC) where the device resistance increases with temperature.
Since a PolySwitch device is made from a composite of semi-crystalline polymer and conductive particles it is specified as a PPTC device. Other PTC devices can be manufactured from a ceramic composite, and are known as CPTC or ceramic PTC devices. PPTC devices differ from CPTC devices in their size, initial resistance, and time to react to fault events. Both are resettable devices but the PPTC device, compared to a CPTC device of the same hold current, will typically react (trip) much faster because the PolySwitch device is smaller and has a lower resistance.
A PolySwitch device is a thermal device and its operation is based on the overall energy balance it is exposed to. Under normal operating conditions, the heat generated by the device and the heat lost by the device to the environment are in balance at a relatively low temperature. In this condition the device will allow its thermally derated Hold-Current to pass to the load.
If the current through the device is increased while the ambient temperature is kept constant, the temperature of the device increases. Further increases in either current, ambient temperature or both will cause the device to reach a temperature where the resistance rapidly increases.
Any further increase in current or ambient temperature will cause the device to generate heat at a rate greater than the rate at which heat can be dissipated, thus causing the device to heat up rapidly. At this stage, a very large increase in resistance occurs for a very small change in temperature. This is the normal operating region for a device in the tripped state (high resistance). This large change in resistance causes a corresponding decrease in the current flowing to the circuit. This relation holds until the device resistance reaches the upper knee of its resistance v. temperature curve. As long as the applied voltage remains at this level, the device will remain in the tripped state (that is, the device will remain latched in its protective state). Once the voltage decreases, the power is removed, and the device cools, the device will reset, and return to low resistance.

Bi-Metal Breakers
The basic operating principle of a bimetal breaker is simple and effective. At the heart of the device is a bimetal snap-action disc. When the temperature of this disc reaches its pre-calibrated temperature, it snaps open, resulting in an open circuit. This temperature can be reached during a fault condition – caused by an increase in ambient temperature, an increase in current flowing through the disc, or a combination of both. After the device breaks the circuit and the system cools the bimetal will automatically reset, allowing power/voltage to be restored to the load circuit. As described, a bimetal and a fuse will go open circuit once activated. However, unlike a fuse a bi-metal can automatically reset, and is not latched open when it is in its activated state, potentially creating a hazard to the user. This can be compared to a PPTC device, which does not open like a bimetal and is typically “latched” (high resistance) until the user resets the system.
Other shortcomings of a bimetal include the potential for “arcing” across the terminals each time it opens. This can ultimately lead to the bi-metal fusing closed so that it will no longer function as intended. Because the bimetal can automatically reset even when the fault is still present it may begin to “chatter”, cycling open/closed, which can introduce large electromagnetic interference (EMI) spikes into the system and/or allow potential hazards to remain on the load.

Hybrid PPTC / Bi-Metal Technology
Concerns about arcing, especially in high-rate-discharge battery pack applications, have led to the development of TE Circuit Protection’s MHP (Metal Hybrid PPTC) device. The device combines a bimetal type device in parallel with a PPTC device, providing both overcurrent and overtemperature protection in a single component.
While it is not a replacement for traditional bimetals, it can be useful in DC-rated designs which require arc-suppressed, latched, high-current protection. The resettable MHP30-36 device, for instance, provides excellent arc suppression characteristics compared to standard breaker devices that must limit the number of switching cycles since arcing between contacts may damage them.
The figure below describes the activation steps of the MHP device:

Activation steps of the Metal Hybrid PPTC (MHP) device.

During normal operation, because contact resistance is very low, most of the current goes through the bimetal.
1. When the contact begins to open, contact resistance increases quickly. If the contact resistance is higher than the PPTC device’s resistance most of the current goes to the PPTC device and no — or less — current remains on the contact, therefore preventing arcing between the contacts. When current shunts to the PPTC device, its resistance rapidly increases to a level much higher than the contact resistance and the PPTC heats up.
2. After the contact opens, the PPTC device starts to heat up the bimetal and keeps it open until the overcurrent event ends or the power is turned off.

As Ty Bowman, Global Battery Market Manager for TE Circuit Protection, states in his blog post: “Li-ion Batteries March into New Markets,” the original intended applications for the MHP family were high-discharge lithium-ion based power tools and use in electric-vehicles (scooters, e-bikes, etc.). Currently higher voltage and hold-current devices are in development to help protect Li-ion battery packs and modules used in solar power systems and other back-up power applications. Since this is a new and unique technology, the best way to understand how the device works is to visit our website under the “MHP” section for several related documents and information sharing sections. This page describes our complete overvoltage, overcurrent, and hybrid protection solutions.

Joe Dinkel, Field Application Engineer with TE Circuit Protection, works with OEM and end-user customers to implement circuit protection solutions. He joined TE in 2007 and has more than 18 years of experience in analog/digital design, application engineering, and safety agency compliance. He received his BSEE from the University Of Florida in 1993.

I recently wrote an article for EE Times‘ SmartEnergy column titled: “PPTC Devices Help Protect High Brightness LEDs“. I invite you all to visit their site and take a look.

It’s an interesting read for anyone who is looking to design in circuit protection for a HB LED lighting system. For more information on circuit protection you can also visit the TE Circuit Protection Knowledge Center. We have a number of application notes and videos to aid you in designing in circuit protection for your applications.